In digital circuits, a shift register is a trigger-based device that operates in several same time pulses (clock signals). Data is input to the device in parallel or in serial. Then, each time pulse moves one bit towards the left or towards the right in sequence and is outputted via an output terminal.
A traditional shift register uses generally the way of performing triggering and outputting simultaneously. That is, in an arrangement of multiple shift registers connected in cascades, a signal outputted from an output terminal of one stage serves not only as an input triggering signal of a next stage of shift register, but also as an output signal of a present stage of shift register. Such shift register has simple configuration and wide applicability, and has already been applied in a variety of digital integrated circuits widely.
However, the output signal of this kind of the shift register would be affected by fluctuation of an alternating current pulse signal of a clock signal, thereby resulting in instability of the output signal and reduction of signal quality. By taking a specific actual application scenario as an example, when this shift register is applicable to a gate line driving circuit of an array substrate, an instable output signal would influence stability of display pixels, which causes display effect reduced or even display faulty occurs.